Samuel Pagliarini, a tenured professor at the Department of Computer Systems, has developed an innovative solution for producing secure integrated circuits (ICs) in cooperation with US researchers at Carnegie Mellon and Stanford.
The security of computer hardware is an increasing challenge given the global distribution of the ecosystem needed to produce ICs. The different stages of IC production are carried out by different organisations based in different countries. This makes it difficult to ensure that ICs are not modified during production and that the knowledge contained therein is not copied. At the same time, IC factories have full access to the placement of components and connections on the surface of the chip, which makes industrial espionage extremely easy.
In order to protect the intellectual property related to ICs and to prevent possible malicious modifications, a team led by Professor Pagliarini developed an innovative programme that automatically splits ICs into two parts in terms of design. The first is produced in a trusted factory, and the second by a third party. This fragmentation has been devised in a way that makes any sort of reverse engineering and espionage virtually impossible. The programme was tested on a real GPS IC, which was split into two using the programme and produced using 16 nm technology.
The innovative idea was published in the prestigious scientific journal IEEE Design & Test, and the first author of the article is Professor Pagliarini at TalTech. The entire project, from conception to publication, took almost four years. The chips produced for validating the technique cost approximately 400,000 USD and was sponsored by the US Defense Advanced Research Projects Agency.
Pagliarini, S., Sweeney, J., Mai, K., Blanton, S., Mitra, S., Pileggi, L. Split-Chip Design to prevent IP Reverse Engineering. IEEE Design & Test. October 2020.
Professor Samuel Nascimento Pagliarini
TalTech, Department of Computer Systems